Teradyne

Plate 01Test Program Generation for J750 CC - PC Screen capture.
Power
3 Phase[3]
Control era
Windows XP SP3
A probe station moves a wafer so each integrated circuit can be aligned for electrical contact and test.[15]
A probe card on the probe station carries several hundred needles that contact pads on the integrated circuit under test.[15]
The tester transmits electrical signals to the integrated circuit and analyzes the responses.[15]
The J 750 test head is connected to the probe station through docking hardware and a pogo tower in wafer probing applications.[15]
The same tester can also be used after packaging in a handler-based test setup.[15]
Control-system eraWindows XP SP3[1]
Tools documented as functional equivalents — same process step and wafer size, from a different manufacturer. Each equivalence cites its source.
Site utility requirements, footprint, and infrastructure needed to install and operate this tool. Sourced from public records.
Tracked replaceable assemblies, spares criticality, and availability status across all major subsystems. Each entry cites its source.
Generated from public-source data on file. Enter your email to access — nothing is published; details are routed privately.
No research found yet — worked with this tool? Share what you know.
The Teradyne J 750 is a semiconductor test system used for testing integrated circuits, including wafer-form testing at a probe station.[2][15]
The J 750 connects to a probe station through a test head and a pogo tower that contacts the tester and the probe card.[15]
The probe station aligns the wafer, the probe card touches the pads on the integrated circuit, and the tester sends signals and analyzes the responses.[15]
The J 750 can also be used during handler-based testing after the wafer is cut and the individual integrated circuits are packaged.[15]
The following facts about the J 750 are absent from this record as of this revision. First-hand knowledge or a citation closes a gap; every submission is reviewed before publication.
No publicly documented production dates or lifecycle milestones (introduction, end of production, EOL) for the J 750 are on record.
Answerable by: OEM historical records or a trade-press announcement
No publicly documented variants, configuration options, or revision breakpoints of the J 750 are on record.
Answerable by: an OEM product catalog or an engineer who ordered or specified the tool
No publicly documented failure modes or field errata for the J 750 are on record.
Answerable by: a field service engineer, process engineer, or maintenance technician
The process node or technology generation of the J 750 is not on record.
Answerable by: an OEM datasheet or a fab qualification report
No publicly hosted manuals, SOPs, or datasheets for the J 750 are on record.
Answerable by: university cleanroom staff or an OEM application specialist
No research found yet — worked with this tool? Share what you know.
Last updated Oct 6, 2026.
The Advantest 93000 is a tester with listed dedicated, infrastructure, digital, and DC components.
The Eagle ETS 200 T is a semiconductor test system for discrete device testing and wafer sort to final test applications.
The PS 1600 Smartscale is a semiconductor test system from Advantest/Agilent/HP/Verigy, introduced in 2012 and including components such as PS 1600 modules, DPS 32, and a Compact Test Head.
The Advantest HP / Verigy PS 3600 Pinscale is a Test & Probe tool in the Advantest HP / Verigy family.